1. Field of the Invention
The present invention relates to the field of digital signal transmissions and more specifically to a process for the acquisition of carrier synchronism in coherent demodulators which receive at their input a modulated signal which is divided in two signals which are multiplied respectively by two quadrature carriers, the resulting signals being then added and substracted to obtain a plurality of signals.
2. Description of the Prior Art
It is known that digital radio signal receivers include demodulators and that to demodulate such signals, generally modulated by the Phase Shift Keying (PSK) technique, it is necessary to reconstruct on the basis of the information contained in the received signals a local carrier identical to the one that was suppressed in the transmitted signals.
Among the methods used for reconstruction of the local carrier, the most widely used are derived from the Costas loop technique and generate the carrier by the use of a local voltage controlled oscillator (VCO) inserted in a phase-locked loop (PLL).
The Costas loop technique has the serious drawback of making possible false locks, i.e. it can happen that the phase-lock loop finds stable points of equilibrium even for particular frequency values of the local oscillator which do not correspond to the input signal frequency, making demodulation of the input signal impossible.
Another limitation of the prior art Costas loop technique and of all known demodulation systems which use a phase comparator for carrier locks is the limited capture range.
As is known, the capture range of a phase-lock loop is given by the maximum frequency difference (.DELTA.f) between the output signal frequency of the local oscillator in the absence of a reference signal and the output signal frequency from the same local oscillator which permits the loop to achieve phase lock in the presence of a reference signal. Because of this limitation it is necessary to equip the phase-lock loop with search devices to increase the capture range thereof.
In the article of G. L. Hedin, J. K. Holmes, W. C. Lindsey and K. T. Woo entitled "Theory of False Lock in Costas Loops" published in IEEE Transactions on Communications, Vol. COM-26, No. 1, January 1978, the authors examine some of the causes which bring about false locks and show that the .DELTA.f.sub.i frequencies at which they can occur have values which are a multiple of the symbol frequency fs divided by the number of the modulation phases in accordance with the formula:
.DELTA.f.sub.i =n.multidot.fs/m, where n=1, 2, . . . and, in case of Quadrature Phase-Shift Keying (QPSK), m=4.
In the aforementioned IEEE article it is shown that the spectral distribution of the error signal in lock condition is different depending on whether the lock is true or false. In particular the components at multiple frequencies of the symbol frequeny have different amplitude. The process proposed to achieve correct lock consists first of detecting the presence of false locks by measurement of the amplitude of the aforesaid components and then forcing the phase-lock loop into the correct lock condition. The proposed process is rather complicated, the hardware implementation is difficult to accomplish and in particular it does not always assure correct operation.
In other published articles there is introduced a parameter called `False-Lock Margin` represented by the ratio between the continuous component of the error signal under true lock conditions and the continuous component of the error signal in the different possible conditions of false lock, dependent in value on the transmission channel band. It can be observed and experimentally confirmed that the false lock margin is extremely reduced in QPSK systems, in which the first false lock takes place for .DELTA.f.sub.i =/4.
This suggests another process for avoiding false locks which consist of limiting the range of the local oscillator to values lower than .+-.fs/8. In this manner all false locks would be avoided.
However, this solution is not always practicable especially in small-capacity systems for which the term fs/8 can be a very small fraction of the nominal carrier frequency. Indeed, in these systems, because of the instability of the local oscillator, transmission oscillator and local oscillator, of the converters contained in the transceiver, the nominal value of the input signal frequency has a certain indefiniteness which can be greater than fs/8.
Hence the above identified process widely used for medium and large capacity systems is unsuitable for small-capacity systems unless sophisticated and costly very-high stability oscillators are adopted.
Another known process proposed for extending the capture range in QPSK demodulators derived from the Costas loop is described in the article by F. D. Natali entitled "AFC Tracking Algorithms" published in IEEE Transactions on Communications, Vol. COM-32 No. 8, August 1984 and which consists of utilizing a phase-frequency comparator.
The aforementioned proposed solution is complex in terms of hardware implementation, requiring the use of linear multipliers and analog-to-digital converters difficult to use in small-capacity systems where low cost and small size are of primary importance.
The object of the present invention is to overcome the aforementioned drawbacks and to provide a process for acquisition of carrier synchronism in coherent demodulators which by making use of a simple and low-cost hardware implementation, gives the phase-lock loop of the demodulator an added frequency characteristic. Such an added frequency characteristic ensures locking between the local carrier and the carrier (suppressed) of the received signals, avoiding false locks, and also ensures a sufficiently wide capture range.